Wireless SoC Power Engineer

Santa Clara Valley (Cupertino), California, United States
Hardware

Summary

Posted:
Role Number:200170442
Do you love crafting elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient wireless system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and deftly handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices.

Key Qualifications

  • The main responsibility of this role is to drive Wireless SOC low power micro-architecture definition, implementation and analysis.
  • Work with multi-functional teams including system architects and software teams to make micro-architectural design trade-offs for power versus performance as well as leakage versus active power.
  • Provide power improvement suggestions and work with multi-functional teams to implement proposed power improvements.
  • Build and lead the definition of interesting power use cases and their implementation in verification environments.
  • Analyze power data from multiple sources, identify power issues attributable to design, implementation or tool flows
  • Maintain and improve existing power modeling and analysis flows.
  • Keep track of the key QoR data from each step, including synthesis and P&R.
  • Provide power projections for future projects based on analysis.

Description

To succeed in this role, you would have: • Experience with ASIC low power micro-architecture and design, • Verilog and System Verilog working knowledge • Good understanding with script writing in Python or Perl. • Hands on experience with PTPX and Power Artist power analysis tools. • Familiarity with physical design tools for power optimization. • Advanced knowledge of SoC design and flow methodology. • Silicon validation / power measurement experience is a plus. • Strong interpersonal skills are a pre-requisite as you will collaborate with a lot of diverse groups.

Education & Experience

BSEE or equivalent experience

Additional Requirements