Compute HW Architect (SPG)
Santa Clara Valley (Cupertino), California, United States
The Compute Hardware Architecture Team in the Special Projects Group is responsible for the definition, specification and technical leadership for the end-to-end compute needs of next generation autonomous systems. We are looking for talented candidates with strong hardware architecture expertise (CPU, GPU and hardware accelerator) and familiarity with signal processing, computer vision and machine learning algorithms. The role requires analysis of algorithms to define compute partitioning between compute resources (CPU, GPU, hardware accelerators), and definition of specialized hardware accelerators or enhancements to existing ones. Does working on autonomous technology excite you? If you're passionate about the user experience and want to be part of a group that works on shaping very early-stage products, we may be the team for you!
- Extensive experience in efficient hardware architecture implementations of computer vision, machine learning and signal processing algorithms.
- Solid understanding of the tradeoffs between CPU, GPU, and hardware accelerator implementations.
- Ability to bench mark algorithms on CPUs and GPUs; analyze performance counters and create high-level algorithm complexity models.
- System-level knowledge of tradeoffs of heterogeneous and interconnected compute resources.
- Demonstrated ability to develop hardware accelerator performance and bit accurate models in high level programming languages.
- Strong object-oriented programming experience in C++,Python, Swift or equivalent high-level languages.
- Familiarity with digital design of hardware accelerator for FPGA or ASIC.
- Excellent communication skills required to interact with cross functional teams from algorithms and software to hardware micro-architecture and circuit design teams.
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Education & Experience
- Ph.D. EE/CE/CS, or M.S. EE/CE/CS with 5+ years of relevant industry experience