ASIC Design Engineer
Newton, Massachusetts, United States
At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a forward-thinking and unusually hardworking IC Designer. As a member of our multifaceted group, you will have the rare and phenomenal opportunity to craft upcoming products that will delight and encourage millions of Apple’s customers every single day. You will get to specify, design and help in the verification and lab bring up of sophisticated mixed-signal circuits (digital side).
- - Strong proven track record of taking chips to production
- - Deep knowledge of ADC/DAC architectures and knowing which are suitable for given applications
- - Deep knowledge of RTL design
- - Deep solid understanding in Mixed signal concepts
- - Knowledge of Algorithm development
- - Working experience with physical design teams
- - Experience with front-end tools (Verilog simulators, linters, clock domain crossing checkers)
- - Good knowledge of synthesis, static timing, DFT is a plus
- - Good knowledge of System-Verilog assertions, checkers and other design verification techniques are a plus
- - Good knowledge of scripting languages. Perl and Python are plusses.
- - Excellent communication and presentation skills
In this role, the key responsibilities are the following: Involved in specifications of analog portions of IC. Behavioral modeling to validate architectures. Transistor-level feasibility studies for various blocks in ADC/DAC. Crafting blocks and detailing design towards formal design reviews. Drive mask design to implement layout view of designs. Top-level simulations to validate top-level integration. Defining production/bench-level test-plans. Taking lab measurements to validate analog designs. Driving/reviewing yield/lab test results to drive bug fixes. Design for ESD compliance.
Education & Experience
Preferred Masters Degree with 3+ years in related area of expertise or PhD with 2+ years of experience