CPU Physical Design Verification Engineer
Santa Clara Valley (Cupertino), California, United States
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish! Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want join us in these pursuits? Join us to help deliver the next groundbreaking Apple product! Apple’s Silicon Engineering Group (SEG) is hiring talented engineers for CPU block-level physical design verification.
- The ideal candidate should possess an MS or BS in Electrical Engineering with 2+ years of physical design verification experience.
- Deep understanding of deep submicron technologies, design rules, and basic device physics.
- Knowledge of timing, electrical verification, noise, clock and EM/IR.
- Experience with synthesis and PNR.
- Knowledge of logic design principles along with timing and power implications.
- Physical verification flow automation experience is a plus.
- Experience with scripting in Perl and/or TCL.
As a Physical Design Verification Engineer, you will own or participate in the following: • Work closely with top level and block level Physical Design Engineers on analysis and fixes on LVS, DRC, ERC Antenna, DFM, etc. • Support ECO definition for logic change, timing violation, and electrical violations for final design delivery. • Work with clock and integration team on definition, implementation, and verification of Power Grid and Clock Grid. • Design delivery. Work with cross-functional engineering team to implement and validate physical design.
Education & Experience
BSEE/MSEE is required.