Debug Tools SOC Physical Design Engineer
Santa Clara Valley (Cupertino), California, United States
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product. Apple’s SoC (system-on-chip) Silicon Validation Team is looking for an engineer with a proven background in silicon architecture and design to maintain and improve our constantly evolving silicon debug tooling. You will utilize your knowledge and skills to ensure our debug community have the best tools to validate Apple silicon. Do you have what it takes?
- Experience with LEQ, UPF and Verilog gate-level netlists
- Experience with different cell library views
- Experience driving silicon tools development
- Strong problem solving and multi-functional skills
- Willingness to collaborate with globally positioned teams.
- C, Python/Perl/TCL, Verilog, SystemVerilog
- ADDITIONAL DESIRABLE QUALIFICATIONS
- Experience with DFX
- Experience with databases
- Experience or interest in data science
You will be building silicon debug tools, focusing on physical data extraction, collation, visualization and analysis, to help in rapid targeted debug and triage.
Education & Experience
BS/MS in Electrical Engineering or equivalent is required.