Graphics Design Verification Flow Engineer

Austin, Texas, United States
Hardware

Summary

Posted:
Role Number:200199154
Do you love crafting elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions! Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all things they love with their devices! Design verification today is managing ever-increasing design challenges that require a scalable infrastructure and more focused support. In this highly visible engineering role, you will be responsible for crafting and maintaining a sophisticated design verification automation infrastructure and flow across all verification domains for multiple projects.

Key Qualifications

  • Experience working/using Digital Design Front End tools and flows with specific focus on scripts and automation
  • Deep knowledge of Design Verification Tools (Simulators, Formal Verification Tools) on how they work and what data they produce
  • Shown knowledge and hands-on experience on scripting using Perl, Python, Makefile
  • Knowledge about SQL style databases and query language
  • Knowledge of Design Verification Methodology
  • Shown understanding of Verilog and/or VHDL
  • Ability to conduct experiments during silicon debug, capturing and analyzing data; and utilize scripting to support efficient handling of ATE data

Description

As a Design Verification Flow Engineer, you will have responsibilities spanning all aspects of design verification: - Working with design verification engineers across multiple design sites to understand requirements and deliver consistent and uniform solutions throughout the organization. - Defining verification build and run flow for various hierarchies of the design and test benches. - Working with internal centralized CAD organizations to unify flows throughout Apple and also drive new requirements in order to unify flows per organization needs. - Defining data management infrastructure for verification result management. - Working with DV leads and engineers to support projects from start to finish. - Defining and implementing improvements to the infrastructure to stay ahead of project needs. - Working with EDA vendors to ensure the tools are accurately coordinated to the flow. - Evaluating new verification tools and assess their integration to the flow.

Education & Experience

BS/MS/PhD CE, EE, CS, or related field

Additional Requirements