Mixed Signal Modeling/Verification Engineer

Santa Clara Valley (Cupertino), California, United States
Hardware

Summary

Posted:
Role Number:200200531
At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? As a member of our dynamic group, you will have the unique and rewarding opportunity to craft upcoming products that will delight and support millions of Apple’s customers every single day! In this role, you will work within the analog mixed-signal design team to model complex custom circuits in order to verify system-level functionality and performance expertly. This is meaningful and rewarding cross-disciplinary position, with a high degree of collaboration and openness across multiple teams. This role will provide the opportunity to work on state of the art mixed-signal systems used in Apple’s world-leading SoCs.

Key Qualifications

  • Strong fundamentals in analog/RF circuit concepts/topologies.
  • Expert in RNM coding in SystemVerilog.
  • Experience working with Cadence mixed signal verification environment.
  • Ability to read analog schematics and extract related main functionality.
  • Experience modeling mixed signal/RF blocks including biasing networks, power regulators, bandgaps, Opamp’s, OTA’s, data converters, LNA, PA, mixers, couplers, splitters, combiners, etc…
  • Experience modeling high frequency PLL’s is desired.

Description

• Development of RNM RF/Analog models in System Verilog. • Develop models with self-checking techniques. • Assess required model accuracy level depending on verification goals. • Develop appropriate assertions to enforce analog/digital specs are respected and provide digital verification passing criteria. • Work with Analog designers setting up AMS simulation environment. • Debug complex chip digital-on-top testbenches and seek root causes for failures.

Education & Experience

Bachelor’s/Master’s degree in Electrical and Computer Engineering. Coursework emphasis on the design of analog/RF building blocks.

Additional Requirements