Design Verification Engineer-- Media Engines
Santa Clara Valley (Cupertino), California, United States
At Apple, our new ideas have a way of becoming phenomenal products, services, and customer experiences very quickly! As part of a highly hardworking team you will be at the heart of the media design effort working on Video and Display engines. You will be collaborating with all disciplines with critical impact in getting top quality products to millions of customers. We bring passion and dedication to our job and when you are a part of our team there's no telling what you could accomplish. The SoC Performance Verification is a critical job within Apple's Hardware Technology. Join this group and be responsible for crafting and building the technology that fuels Apple's devices. Together, we will enable our customers to do all the things they love with their devices.
- Basic knowledge of computer architecture and digital design.
- Knowledge of Verilog and Verilog simulators.
- Knowledge of scripting languages such as Perl.
- Should be a great teammate with excellent interpersonal skills and the desire to tackle diverse challenges.
- Experience with UVM or SystemVerilog.
- Knowledge or working experience with Media or Video processing.
- Experience with hardware acceleration or Silicon debug.
- Experience with low-level programming of sophisticated computer systems in C/C++/assembly.
Responsible for ensuring the pre-silicon quality of key media processing hardware such as Apple’s Video and Display engines and Apple’s Neural Engine. Review architecture specifications to develop comprehensive test and coverage plans. Develop the verification environment and tests to implement test plans, using Object Oriented tools, in particular SystemVerilog and UVM. Work closely with design and architecture teams to understand the functional and performance goals of the design; and work together to make the design-under-test work under all specified circumstances. Triage and debug functional and performance issues with the design-under-test. Handle bug tracking and coverage convergence. Stay abreast with design specs, conduct test plan reviews, develop block, subsystem and full chip tests. Work independently to align with the project goals and support multi-functional engineering efforts.
Education & Experience
BSEE / MSEE or MSCE