Design Verification Engineer-- Neural Engine

Santa Clara Valley (Cupertino), California, United States
Hardware

Summary

Posted:
Role Number:200204745
At Apple, our new ideas have a way of becoming phenomenal products, services, and customer experiences very quickly! As part of a highly hardworking team you will be at the heart of developing the next generation of Apple’s Neural Engine. You will be collaborating with all subject areas with critical impact in getting top quality products to millions of customers. We bring passion and dedication to our job and when you are a part of our team there's no telling what you could accomplish. The SoC Performance Verification is a critical job within Apple's Hardware Technology. Join this group and be responsible for crafting and building the technology that fuels Apple's devices. Together, we will enable our customers to do all the things they love with their devices.

Key Qualifications

  • Basic knowledge of computer architecture and digital design.
  • Knowledge of Verilog and Verilog simulators.
  • Knowledge of scripting languages such as Perl.
  • Should be a standout colleague with excellent interpersonal skills and the desire to take on diverse challenges.
  • Experience with UVM or SystemVerilog for verification.
  • Experience with hardware acceleration or Silicon debug.
  • Experience with low-level programming of sophisticated computer systems in C/C++/assembly.

Description

Responsible for ensuring the pre-silicon quality of Apple’s Neural Engine. Review architecture specifications to develop comprehensive test and coverage plans. Develop the verification environment and tests to implement test plans, using Object Oriented tools, in particular SystemVerilog and UVM. Work closely with design and architecture teams to understand the functional and performance goals of the design; and work together to make the Neural Engine work under all specified circumstances. Triage and debug functional and performance issues with the Neural Engine. Lead bug tracking and coverage convergence. Stay abreast with design specs, conduct test plan reviews, develop block, subsystem and full chip tests. Have strong communication skills combined with good team-oriented approaches to lead the verification efforts in a specific area of the design. Work independently and manage deliverables to align with the project goals and support cross-functional engineering efforts.

Education & Experience

BSEE / MSEE or MSCE

Additional Requirements