PHY System & Algorithm Engineer
Santa Clara Valley (Cupertino), California, United States
At Apple, we strive to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunia forward-thinking visionary and unusually talented PHY System & Algorithm Engineer. As a member of our dynamic group, you will have the rare and extraordinary opportunity to craft upcoming products that will delight and inspire millions of Apple’s customers every single day. You and your team will apply engineering fundamentals and start from scratch if need be. Join us, and you’ll help design the tools that allow us to bring customers experiences they’ve never before imagined. In this technical role, you will be at the center of a silicon design group responsible for physical layer system and algorithm design for state-of-the-art wireless SoC products.
- This is an individual technical contributor role that requires a proven track record in designing signal processing and Wireless Communications Systems.
- Deep understanding on Wireless Communication System (OFDM/MIMO, etc),
- Hands on experience on lab testing & characterization is a plus.
- Deep understanding of communication theory & signal processing related algorithms design (such as timing recovery, signal estimation and detection, automatic gain control, RF impairment estimation and correction, channel estimation, equalization, coding theory, etc.)
- Experience with Matlab or Python and/or C/C++ for algorithm development, modeling, and simulation.
- Experience and knowledge on High Level Synthesis (HLS) will be a plus
- Experience on bring up real silicon in lab, be able to efficiently use lab equipment (such as spectrum analyzer, signal generator, power meter, etc).
- Knowledge in existing wireless communication protocols: LTE/WCDMA/GSM, 802.11a/b/g/n/ac/ax, 802.11ad or Bluetooth/BLE
Design and simulate state-of-the-art physical layer Wireless Communication System algorithms for very high data rate applications. Implement fixed-point models and perform detailed performance investigation to allow performance sign-off and enable RTL bit-exact development. Work with digital designers to realize these algorithms with power and area efficient digital implementations. Test and characterize real silicon in lab.
Education & Experience
MS with 7-10 Years experience or Ph.D. with 3-5 Years experience.