Wireless SoC Silicon Power Engineer
San Diego, California, United States
Come join Apple’s growing wireless silicon development team. Our wireless SOC organization is responsible for all aspects of wireless silicon development. With a particular emphasis on highly energy-efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture, and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. If you enjoy a fast-paced and challenging environment and collaborating with people across different functional areas as well as thriving during crisis times, we encourage you to apply.
- 5 or more years of experiences in SoC integration and Low Power ASIC design
- Hands on experience with PTPX and Power Artist power analysis tools
- Proficiency in ASIC logic design
- Extensive experience with SoC power management design including power gating, isolation, retention and DVFS techniques
- Deep understanding of ASIC low power design techniques, e.g. Power analysis, UPF, VCLP
- SoC level clock mesh / reset design experience desirable
- Proficiency in scripting languages (Shell and Perl highly desirable, Python skills are a plus)
- SoC top-level integration experience is a plus
- System architecture knowledge is a bonus
- Silicon validation / power measurement experience is a plus
- Drive low power micro-architecture, definition, implementation, and analysis - Maintain power roll-up and power spec at the chip level - Own complex SoC low power design, analysis, and implementation - Writing specifications and other documents - IP integration, RTL logic design, and DV support - Running tools to ensure lint-free and CDC clean design - Synthesis and timing constraints
Education & Experience
MSEE or PhD.