Display Pipeline Architect
San Diego, California, United States
Apple display engineering organization is looking for a Display Pipeline Architect to perform system and visual quality validation for the next generation display pixel and backlight pipeline IPs. The role offers an incredible opportunity to learn from world class experts in multiple disciplines spanning from EE to system, mechanical, manufacturing, etc. Join us in crafting solutions the world doesn't know of yet. To be successful, you should be able to thrive in a dynamic, agile, multi-disciplinary, and hands-on environment that values engineering excellence, creativity, and innovation.
- Excellent communication skills and ability to collaborate under aggressive schedules.
- Ability and motivation to understand top to bottom architecture and functional details of a complex system with multiple inter-dependencies.
- Excellent math and analytical skills.
- Experience in the field of image/video processing algorithms and/or architectures.
- Experience with relevant developments using programming tools and languages such as C/C++, MATLAB, Python, Lua, HLS, etc.
We are looking for a talented architect with very strong analytical skills, a drive for excellence, and a passion for learning, creating and innovating. The main responsibilities are outlined below, and these will become a second nature as the candidate gains the necessary experience and knowledge in the work: - Challenge the algorithm and architecture assumptions and specs. - Perform visual and quantitative evaluations through the use of platforms such as Matlab/C models, FPGA systems, Prototyping HWs, hands-on lab testing, simulations, metrics development, etc. - Craft necessary scripts, tools and frameworks to efficiently carry out the evaluations and validations of the display system. - Conduct investigations from start to end with minimal guidance, form a recommendation and present clear and convincing results. - Develop innovative solutions to solve issues or enable new features by modifying the display system behavior and/or enhanced or new algorithms. - Drive collaboration with key partners such as algorithm, architecture, silicon, FW, SW, EE, etc. to plan, execute, and report status of the product performance.
Education & Experience
PhD or MS in an Engineering discipline, or equivalent experiences.