System Validation and Calibration EPM - Technology Development Group

Santa Clara Valley (Cupertino), California, United States


Weekly Hours: 40
Role Number:200255398
Apple’s Technology Development Group (TDG) is looking for an experienced, highly technical EPM to drive cross-functional systems engineering of an advanced hardware system. This will include tying multidisciplinary topics(cameras, display, Computer Vision, calibration) together and formulating integration and validation plans that map from top level features down to hardware design and test methodologies. Often this will include multiple subsystems and a deep understanding of how they tie together. Given the advanced nature of the product the EPM will need to define tradeoffs, distill them into key characteristics, and drive product decisions for this generation and the next. Does this sound like you? If so we'd love to hear from you!!!

Key Qualifications

  • 5+ years experience in Engineering Program Management managing cross-functional teams including HW/SW integration during the development and validation stages of hardware systems
  • Strong technical background in hardware development and experience in consumer electronics. Good understanding of various validation techniques and approaches to defining requirements where none exist
  • Design or validation experience with some OR all of the following areas (cameras, computer vision algorithms, calibration)
  • Excellent team player whom is self motivated, proactive, and has a high attention to detail
  • Understands and works well in a rapidly evolving development program. Remains flexible, eager to learn, and works well in times of uncertainty
  • Ability to travel internationally


As a Systems Engineering EPM, you will partner with the hardware engineering and architecture teams to define specifications, create validation plans, and drive cross functional reviews with peers and executive teams. You will be responsible for: Driving the creation of hardware system specifications based on top level features Mapping top level feature to hardware requirement to test requirement and the validation plans for each target Coordinating with SW, HW architecture, and integration teams to develop methodologies to track and validate progress towards experience targets as the system continues to evolve Travel internationally to support engineering builds.

Education & Experience

BS/MS CE/EE/CS or equivalent work experience

Additional Requirements