Emulation Verification Engineer

Irvine, California, United States


Role Number:200276201
Imagine what you could at Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish! Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Are you passionate about changing the world? We have a critical impact on getting high quality functional products to millions of customers quickly. We are looking for you to join our emulation team focusing on the creation, deployment, and support of sophisticated emulation environments. In this highly visible role, you will be at the center of a chip design effort collaborating with all fields. Are you ready to help us deliver the next groundbreaking Apple products?

Key Qualifications

  • 5+ years of experience with bring up, debugging and verification in Emulation
  • Understanding of the tool flow from RTL to Emulation is a big plus
  • Good understanding of any Standard Emulator (Palladium, Veloce, Zebu) OR FPGA (Xilinx, Altera) flow
  • Proven design verification skills
  • Experience in writing Synthesize-able SystemVerilog/Verilog code and SystemVerilog assertions
  • Experience with System Verilog verification environments including C/C++ DPI, UVM
  • Experience on any Scripting (Perl/Python/TCL)
  • Excellent analytical and debug skills
  • Experience in UVM Acceleration is plus


As a member of the Emulation verification team, you will play a key role in utilizing Emulation for verification of large Wireless SoCs. You will also be involved in the most ground breaking technology of bringing in mixed signal models onto the Palladium platform. The overall work will involve porting the design onto the Palladium platform, followed by executing the detailed Emulation test plans. Core Responsibilities would include: - Bringing up the emulation platform for large Wireless SoCs along with their mixed signal components. - Developing monitors and checkers for Emulation platform and come up with the latest techniques to achieve better performance - Preparing and executing the test plan and performing reviews with the cross-functional teams - Collaborating cross functionally with Design, Architecture, Power, Silicon Validation, Performance and SW Teams - Developing code for Design and verification that aids with emulation activities, using Verilog/System Verilog/UVM

Education & Experience

BSEE + 7 years of industry experience or MSEE + 5 years of industry experience.

Additional Requirements