CPU Power Management RTL Architect

Santa Clara Valley (Cupertino), California, United States


Role Number:200291027
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product! Apple’s Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power our innovative products, including the iPhone, iPad and Mac. We are looking for an experienced technical leader to drive world-class CPU power management solutions.

Key Qualifications

  • Knowledge of Verilog and/or VHDL and experience with simulators and waveform debugging tools
  • Knowledge of logic design principles along with timing and power implications
  • Understanding of low power microarchitecture techniques and high performance techniques and trade-offs in a CPU microarchitecture
  • Knowledge and experience related to CPU power management:
  • Dynamic voltage and frequency scaling
  • Advanced thermal and energy management
  • Power state definition and management
  • Dynamic clocking solutions
  • Di/dt mitigation strategies
  • Micro-architecture strategies for improved power integrity
  • Debug, error handling, and security solutions
  • DFT strategies
  • Clock generation, reset control and asynchronous clock crossing strategies
  • Multi-voltage design strategies
  • Experience in C or C++ programming and using an interpretive language such as Perl or Python


As a CPU Power Management RTL Architect, you will own or contribute to the following: • Microarchitecture development and specification - from early high-level architectural exploration through microarchitectural research and arriving at a detailed specification • RTL ownership - development, assessment, and refinement of RTL design to target power, performance, area, and timing goals • Validation - support test bench development and simulation for functional and performance verification • Performance exploration and correlation - explore high performance strategies and validate that the RTL design meets targeted performance • Design delivery - work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability, and power

Education & Experience

BS or MS in Computer or Electrical Engineering with 5+ years of relevant architecture and RTL experience.

Additional Requirements