Mixed signal timing Verification Engineer (m/f/d)

Linz, Upper Austria, Austria
Hardware

Summary

Posted:
Role Number:200316435
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, amazing people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help design the next groundbreaking Apple product! If you are eager to work on challenges that no one has solved yet you will have an outstanding and exciting opportunity to craft upcoming products that will delight and encourage millions of Apple’s customers every single day.

Key Qualifications

  • The ideal candidate will possess the following qualifications:
  • - Experience in transistor- or gate-level static timing and noise analysis.
  • - Experience in timing / SDC constraints development and management.
  • - Experience with NanoTime, PrimeTime, or Tempus STA tools.
  • - Good understanding of tool algorithms for noise glitch, cross-talk delay, and margining with OCV / AOCVM / POCV.
  • - Proficiency in scripting languages (Tcl/Perl/Python).
  • - Experience in RTL design and simulation is a plus.
  • - Experience in transistor- or gate-level mixed signal custom logic design is a plus.
  • - Familiarity with ECO techniques and implementation is a plus.
  • - Strong communication and interpersonal skills.

Description

In this role, you will be part of a design team developing solutions for the most sophisticated Wireless transceivers. You will perform timing analysis on digital, custom and semi-custom design circuits, delivery timing views to integration teams. You will work closely with custom design, digital design engineers, and multi-functional teams at silicon and module levels. RESPONSIBILITIES INCLUDE: - Timing verification ownership throughout the entire project cycle. - Develop STA constraints from specifications. - Perform block- and chip-level static timing and noise analysis. - Work with RTL and custom design teams on timing changes and propose correct-by-construction designs and methodologies. - Evaluate and design block interface concepts with System-engineering team. - Assist Functional Verification and DFT teams to debug functional and testing issues. - Assist CAD in developing and maintaining methodologies and flows related to timing verification and closure.

Education & Experience

- Master Degree in Electrical Engineering or equivalent. Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Apple is committed to working with and providing reasonable accommodation to applicants with physical and mental disabilities.

Additional Requirements