Digital Design Engineer

Santa Clara Valley (Cupertino), California, United States
Hardware

Summary

Posted:
Role Number:200334571
Why Apple? We live in a mobile and device driven world where knowledge of the physical world around us is needed. We rely on this knowledge to get around, to learn about our environment and to enable spectacular new features for custom applications. Apple is meeting those needs as robustly and as creatively as possible and is interested in people who want to help meet that commitment. The success we are striving will be the result of very skilled people working in an environment which cultivates creativity, partnership, and thinking of old problems in new ways. If that sounds like the kind of environment that you find intriguing, then let's talk. The Camera Hardware Engineering group is responsible for the design, development, and innovation of camera hardware for all related Apple products. Our target is to deliver extraordinary hardware to enable exclusive camera user experience. We are looking for an enthusiastic, high energy individual who can help us with tomorrow’s challenges. The Camera Hardware Engineering group is responsible for the design, development, and innovation of camera hardware for all related Apple products. Our target is to deliver extraordinary hardware to enable exclusive camera user experience. We are looking for an enthusiastic, high energy individual who can help us with tomorrow’s challenges.

Key Qualifications

  • 10+ years of digital design experience in complex multi-million gate architectures and deep sub-micron technologies.
  • Solid understanding of crypto algorithms and standard methodologies
  • Understanding various standards is a huge plus
  • Good foundation on theoretical security models/architecture & solutioning for cryptographic protocols
  • Able to work with multi-functional teams within Apple and external vendors across geographical boundaries to resolve architectural and implementation challenges with an eye towards schedule.
  • Experience with multiple tape-outs with a majority of the tape-outs reaching MP with first silicon.
  • Drive and improve digital design methodology and tool flows to achieve high quality first silicon.
  • Proven knowledge of high-level programming languages
  • Hands on experience with FPGA emulation, silicon bring-up, characterization and debug
  • Experience in algorithm development and signal processing data-path design
  • Experience with mixed signal design is helpful.
  • Expertise in Clock Domain Crossing design and verification techniques.

Description

Deliver sophisticated digital IPs, meeting schedule, area, power, and performance targets. Collaborate with other specialists in Camera, ISP, hardware, firmware, and software teams to define sub-system/chipset/silicon requirements Research, define and write detailed design specifications for cryptographic algorithms including Define commands/features new products Security concepts and techniques such as cryptography, access control, authentication, auditing, side-channel analysis, etc. Trade off specific issues against system limitations & help improve engineering requirement specification documents for custom silicon Work with external vendors in developing micro-architecture, verification and design of custom silicon. Drive vendor’s methodology to meet Apple standards. Target to achieve bug free first silicon to meet aggressive product schedules. Implementing and verifying sophisticated logic designs. Emulation, STA, and Physical Design teams to implement power/clock manager which meets all requirements of the each block. Integrating various IPs and ensuring design meets DFT (design-for-test), CDC (clock domain crossing), Synthesis/Static Timing and Power Requirements. Working with CAD and Flow teams to define and improve front-end design methodologies. Ability to work well within a team environment and a curiosity about deepening knowledge of real-world information security principles Work with silicon validation team in developing lab validation and qualification plans. Collaborate with managers and program managers to track progress and gauge tape-out readiness. Excellent written and verbal communication skills and proven teamwork and leadership skills.

Education & Experience

BS/MS/PhD in a relevant field (EE, CE or Physics)

Additional Requirements

  • Familiarity with power estimation tools and techniques.
  • Understanding of silicon development milestones and project resource management.
  • Proven understanding of low power design techniques, including clock and power gating.