Emulation Design Verification Engineer

Santa Clara Valley (Cupertino), California, United States
Hardware

Summary

Posted:
Role Number:200354035
Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices. As a member of the SOC Design Verification team, you will play a key role in using Emulation for verification of large SoCs. We will also be involved in the most ground breaking technology of bringing in sophisticated IPs onto the Palladium platform. Gaining valuable experience porting the design onto the Palladium platform, followed by implementing the detailed Verification test plans!

Key Qualifications

  • Experience with bring up, debugging and verification in Emulation
  • Understanding of the tool flow from RTL to Emulation is a huge plus
  • Good understanding of any Standard Emulator (Palladium, Veloce, Zebu) OR FPGA (Xilinx, Altera) flow
  • Experience in writing Synthesize-able SystemVerilog/Verilog code and SystemVerilog assertions
  • Experience with System Verilog verification environments including C/C++ DPI, UVM
  • Experience on any Scripting (Perl/Python/TCL)
  • Excellent analytical and debug skills
  • Experience in UVM Acceleration is plus

Description

Bringing up the emulation platform for large SoCs for complex IPs. Developing monitors and checkers for Emulation platform and come up with the latest techniques to achieve better performance. Preparing and carrying out the test plan and performing reviews with the multi-functional teams. Collaborating with Design, Architecture, Power, Silicon Validation, Performance and SW Teams. Developing code for Design and verification that aids with emulation activities, using Verilog/System Verilog/UVM

Education & Experience

BSEE + 7 years of industry experience or MSEE +5 years of industry experience.

Additional Requirements

  • Apple is an equal opportunity employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants. Apple is committed to working with and providing reasonable accommodation to applicants with physical and mental disabilities. Apple is a drug-free workplace.