Graphics Unit Design Verification Engineer

Austin, Texas, United States


Role Number:200471024
Do you love creating elegant solutions to highly complex challenges? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC)! You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices! In this highly visible role, you will be at the heart of the chip design effort collaborating with a variety of fields with critical impact in getting products to millions of customers quickly. The Graphics Unit Verification Engineer will be responsible for the pre-silicon RTL verification of blocks in low power embedded graphics cores. This includes deep understanding of the micro-architectural details of their block and how it works within the broader GPU design. A strong computer architecture background, preferably in graphics, and a solid foundation in verification methodology will be required to close testing coverage with high confidence.

Key Qualifications

  • Minimum BS and 10+ years of relevant industry experience.
  • Expertise with Verilog, System Verilog, UVM/OVM.
  • Expertise with various HDL simulators and waveform viewers like IES, VCS, DVE, Verdi.
  • Proven experience with Perl, Shell scripting, Makefiles, TCL.
  • Strong experience with low-level programming of complex computer systems in C, C++.
  • Strong experience working under strict schedule deadlines with the ability to manage multiple priorities.
  • Excellent communication skills and ability to collaborate.
  • Strong knowledge of computer architecture; graphics architecture is a plus.
  • Good experience with code repositories; Perforce.
  • Extensive experience with constrained random verification process, functional and code coverage, assertion methodology.
  • Extensive experience debugging complex design and environmental issues.


• Lead unit-level, subsystem, or top verification teams for logic blocks in graphics processing unit (GPU) designs. • Own overall development, execution, and tracking of team's test plans. • Architect test bench methodology using Universal Verification Methodology (UVM) and SV components. • Build testing stimulus, coverage, and regression strategy. • Own and maintain testbenches and BFMs. • Debug simulation and silicon GPU failures. • Drive discussions with design & micro-architecture teams, as well as with other multi-functional teams to coordinate unit-level or top-level verification efforts. • Generate and present weekly status to GPU leadership team.

Education & Experience

Minimum BS and 10+ years of relevant industry experience.

Additional Requirements