Senior Wireless System Engineer – DSP for Power Amplifier Linearization
Santa Clara Valley (Cupertino), California, United States
Hardware
At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a forward-thinking and unusually hardworking Wireless System Engineer. As a member of our dynamic group, you will have the rare and extraordinary opportunity to craft upcoming products that will delight and encourage millions of Apple’s customers every single day.
For wireless system, power amplifiers (PA) in the transmitter are the main source of power consumption. To improve efficiency, PA must be designed beyond the classic class-AB, together with enhancement using envelope tracing, or envelope elimination and restoration (EER, or polar transmitter). Those designs come with impairments or nonlinear distortion that need to be clean up using digital signal processing techniques. RF/analog architectures, with the help of DSP, their optimizations and calibrations are the critical technique to achieve such high performing systems.
In this technical role, you will be at the center of a silicon design group responsible for using digital algorithm or method to improve the PA efficiency, reducing power consumption, but with acceptable linearity for high data rate applications. You will mainly work on architecting various calibration and correction methods for implementation in hardware/firmware and validation of overall performance enhancement through lab measurement. You will interact with RF/analog designers, software or firmware engineers, digital designers, product engineers and architects to define and specify parts in the wireless systems.
Key Qualifications
- Extensive experience in designing relevant signal processing for wireless communications systems.
- Proven track record of optimization algorithm and its applications to RF calibration
- Good understanding of the methods to estimate various RF impairments via direct equipment measurement or self-testing via loopback.
- Experiences in digital predistortion, crest-factor reduction, nonlinear crosstalk/interference cancellation, and real-chip bring-up in lab
- MATLAB or Python or C/C++ for algorithm development, modeling and simulation.
- Hands on experience on lab testing and characterization (such as spectrum analyzer, signal generator, signal analyzer, power meter, etc.).
- Some understanding of RF and analog components/modules composited of wireless communication systems, the possible impairments from those components, their impact to MIMO OFDM signals, and the corresponding calibration and impairment reduction methods/algorithms.
- Preferred to understand communication theory & signal processing related algorithms design (such as timing recovery, signal estimation and detection, automatic gain control, channel estimation, equalization, coding theory, etc.)
- Preferred to have some knowledge in existing wireless communication protocols: 5G-NR/LTE/WCDMA/GSM, 802.11 WiFi, and/or Bluetooth/BLE
- Course works and experience in circuit design – a plus
Description
In this role, core responsibilities include, but are not limited to, the following:
•Design and simulate state-of-the-art wireless transmitter for very high data rate applications.
•Investigate innovative PA architectures, calibration algorithms, processing structures for performance enhancement.
•Architect HW/FW/SW partitioning of various calibrations for area and time efficiency.
•Implement system models of the analog front-end design, impairments and come up with right controls and calibrations in C and MATLAB for optimal system performances.
•Work with digital designers to realize these methods with power and area efficient digital implementations.
•Work with firmware designers to realize these methods with high efficiency software implementation, and possibility hardware acceleration.
•Bring up, test and characterize real silicon with relevant implementation in lab.
Education & Experience
BS and 10+ years of relevant experience required. MSEE/PhD preferred