GPU Silicon Triage Engineer
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Do you love working on challenges that no one has solved yet? Are you ready to join a team redefining hardware technology? The Graphics Triage Engineer is the first point of contact for GPU related issues impacting Apple SOC silicon. As a member of the Apple GPU Silicon Triage Team, you will use your knowledge of SOC/GPU design, debug features and related tools, validation, and problem-solving in order to drive failures to resolution. You will be debugging failures that come from GPU silicon validation, driver development, and internal stress testing that appear to be design issues or that require silicon expertise in order to root cause. You will work at the cross-section of hardware and software and partner with engineers to quickly root cause failures. You will also drive systematic improvements in debug methods, tools and features based on your findings and expertise.
In this role you will:
- Manage and coordinate a collection of prototype development hardware for the use of GPU stress testing.
- Triage GPU-related issues from prototype SOC silicon to Graphics subsystems.
- Coordinate cross-functional design and verification experts within the company to root-cause GPU issues.
- Use scan dump and other silicon debug tools/methodologies to understand silicon state and drive future testing to refine debug theories.
- Create GPU Stress testing plans and execute them on prototype SOCs running the latest development SW stack.
- Create new debug tools, flows, and approaches to speed and automate silicon debug.
- Create and maintain documentation on all silicon impacting GPU issues that result in HW ECOs and or Errata.
- Debug issues using RTL simulation/emulation verification methodologies.
- Mentor and lead engineers to further long term team goals.
- BS required + 10 years of relevant experience.
- Experience with system or SOC architectures.
- Experience with CPU or GPU architectures.
- Experience in C or C++, and Python.
- Previous experience with pre-silicon design verification and debug methodologies.
- Previous experience with post-silicon validation and debug methodologies.
- Understanding of the strengths and weaknesses between behavioral modeling, simulation, emulation, FPGA prototyping, and formal proofs at the various stages of the design and validation process.
- Demonstrated understanding of hardware functions at the micro architectural level.
- Proficient with scripting (Python preferred) and programming (C/C++ preferred) languages.
- Demonstrated ability to debug RTL failures from waveforms.
- Demonstrated ability to debug silicon failures from scan dumps.
- CPU design (ARM preferred) design and programming knowledge a plus.
- GPU design and programming (Metal preferred) knowledge a plus.
- Experience with web application development (React, TypeScript, JavaScript, NodeJS, HTML5, CSS, etc.) a plus.
- SQL, no-SQL database design and management experience a plus.
- Leadership and/or mentoring experience in an engineering environment.
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