VLSI CAD Engineer
Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn’t have imagined, and now, can’t imagine living without. It’s the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
APPLE INC has the following available in Austin, Texas. Design and manufacture next-generation, high-performance, power-efficient processor, system-on-chip (SoC) Close partitions through silicon TO. Script in TCL or Perl while assisting with trade-offs between product success metrics, in particular under constraints of on-device Machine Learning. Debug Mixed Signal QA flows in addition to PD flows using knowledge in areas such as floor planning, placement, optimization, clocking, and routing. Develop innovative solutions in physical design and optimization space while working with cross-functional teams to solve key physical design challenges. Develop methodology for low power designs while collaborating with other tools like Physical Design Verification, RC extractions, IR and Static Timing analysis (STA). Develop flows for innovative technologies while working with Placement and Routing tools such from industry vendors. Support implementation flows. Develop flows for better PPA and productivity including Machine Learning based solutions while working with tool vendors to resolve tool/flow issues. Develop and maintaining custom CAD tools for implementation and signoff while working in CAD Place and Route flows. 40 hours/week.
- Master’s degree or foreign equivalent in Electrical Engineering or related field and 1 year of experience in the job offered or related occupation.
- 1 year of experience with each of the following skills is required:
- Using Physical Design Flow, and experience developing new flows and methodologies for PD design execution.
- Timing Closure experience, including experience assisting PD teams in closing timing for production designs and beating the performance targets with minimal iteration.
- Debugging and enabling PD and cross functional internal teams with effective solutions.
- Experience in scripting, including flows automation and developing customize tooling for design needs.
- Understanding clocking concepts; and building optimized low power high performance clock tree flows.
- Power closure experience, and experience with power flows to optimize designs.
- Solid Experience in Industry Cadence or Synopsys P&R tools.
- N/A
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