CAD Emulation Infrastructure Engineer
Beaverton, Oregon, United States
Hardware
Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices!
Key Qualifications
- Strong software development background
- Expertise in Python, Perl, Kotlin and/or TCL is required
- Expertise in batch job schedulers (ie. LSF, NC), Cloud Computing, DevOps and Infrastructure are a plus.
- Experience with version control software (ie. Git, Perforce) is a plus
- Experience in Verilog and System Verilog is a plus
- Emulation experience on any available platforms, Palladium, Veloce or Zebu is a plus
- Xilinx and Altera FPGA experience is a plus
- Machine Learning experience is a plus
- Must have good communication skills, previous customer support is a plus
- Ability to come up with initiatives and drive them from concept to production
- Must have worked on significant project(s) that brought high ROI to the team/company
- Must be comfortable with co-developing an existing system
Description
Emulation CAD engineering plays a major role in creating, maintaining and promoting a robust system of advanced emulation environments our customers heavily rely on in accomplishing critically important verification for our chips. You will work very closely with the Platform Engineering team as well as with Digital Verification team in making our FPGA and emulation platform more palatable for long simulation and software workloads. You will have the opportunity to support and promote our virtual prototype solution for faster bring-up as well as provide an even faster verification platform for our chips.
This role requires close collaboration with the Platform Engineering team, Design, DV, Power, Silicon Validation, Performance and Software teams.
Education & Experience
Minimum requirement of BS + 10 years of relevant industry experience.