Digital Design Engineer - Power Management (m/f/d)
Munich, Bavaria-Bayern, Germany
Hardware
At Apple, we work every single day to craft products that enrich people's lives. The people here at Apple don't just build products - they create the kind of wonder that revolutionizes entire industries. We invite you to join our dynamic group, for the unique and rewarding opportunity to contribute to upcoming products that will delight and inspire millions of Apple's customers every day! Apple’s PMU Hardware Tech team are responsible for delivering the power in a highly configurable and controlled way to the high end Apple SoCs, which power everything from Apple Watch and Apple TV to iPhone, iPad and Mac. We’re looking for dedicated engineers who can help us to innovate the way we verify power management devices, to provide industry leading power and battery efficiency and achieve customer expectations of device performance. Do you love working on challenges that no one has solved yet? Then we welcome you to work among the industry’s best.
As a Digital Design Engineer on this team, you will be at the center of the digital logic design effort within a chip development group responsible for designing and productising state-of-the-art Power Management ASICs.
Key Qualifications
- 5+ years of ASIC/VLSI design experience and a track record of developing complex ASIC functions in successful products
- Knowledge of best practices with respect to implementation of digital logic
- Understanding of digital design flow including RTL simulation, CDC, logic synthesis, timing constraints, timing closure, STA, back annotation of parasitics, gate level simulation, equivalence checking
- Are aware of asynchronous design concepts, related rules and restrictions
- Have experience with Analog/Digital interface implementations
- Comfortable with analysing a design and partition between HW implementation and SW control
- Excellent written and verbal communication skills
- Ability to work well with international teams, take ownership and motivate self and others
- Fluent English skills
Description
We are involved in all phases of the product development cycle, from concept study, architecture definition, RTL design and verification, to silicon bring-up and characterisation in our Munich team!
Your tasks will involve:
- You work with Chip Architect and Analog Design teams to understand the top level requirements of the digital functions and develop detailed specifications
- Partition the functions between HW and FW for the most efficient implementation
Implement the functions in (System)Verilog RTL to specification
- Perform basic unit level testing of the RTL functions
- Equivalence checking, Static Timing Analysis
- Collaborate with the verification team by writing self-checking tests as the need arises
- Develop FW to support DV and ATE environments
Education & Experience
BSc, MSc or PhD in Electrical Engineering or related field
Additional Requirements
- We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, colour, national origin, gender, sexual orientation, age, marital status, veteran status or disability status.