SoC Physical Design Engineer, Top Level

Beaverton, Oregon, United States


Role Number:200477347
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hardworking people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product! In this highly visible role, you will be responsible for implementing complete chip design from netlist to tapeout.


• Work with the FE team to understand chip architecture and drive physical aspects early in the design cycle. • Work with the physical design team to drive methodologies and “best known methods” to streamline physical design work, come up with guidelines and checklists, drive execution, and track progress. • Be a focal point for place and route, drive the work among place and route engineers, set goals and milestones, plan short and long-term work, understand dependencies between different domains like top, STA, block place and route. • Resolve design and flow issues related to physical design, identify potential solutions, and drive execution.

Minimum Qualifications

  • Minimum BS and 3+ years of relevant industry experience.
  • Knowledgeable in partition or top level P&R implementation including floorplanning, clock and power distribution, timing closure, physical and electrical verification.
  • Strong knowledge of physical design construction and analysis flows and methodology.
  • Strong communication skills
  • Experienced with industry standard tools, understanding their capabilities and underlying algorithms.

Key Qualifications

Preferred Qualifications

  • Experience with Top Level a plus but not required.
  • Shown ability to adhere to stringent schedule and die size requirements.
  • Experience with large SOC designs (>20M gates) with frequencies in excess of 1GHZ.

Education & Experience

Minimum BS and 3+ years of relevant industry experience

Additional Requirements

  • Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.