ASIC Design Engineer - Pixel IP
Santa Clara Valley (Cupertino), California, United States
Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions! Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, we will enable our customers to do all the things they love with their devices. In this highly transparent role, you will be at the center of a multimedia IP design effort working with all teams, with a critical impact on getting functional products to millions of customers quickly.
- Previous strong experience in media, video, pixel, or display designs.
- A good understanding of timing/area/complexity tradeoffs for sophisticated data path design
- Familiarity with common on-chip bus protocols such as AMBA (AXI, AHB, APB)
- Experience in front-end implementation tasks such as synthesis, STA, and logic equivalence
- Industry exposure to and knowledge of ASIC/FPGA design methodology
- Strong collaboration skills
- Outstanding written and verbal communication
Collaborate with the architecture team to write microarchitecture specifications and define interfaces for pixel-processing IP Perform feasibility analysis on suggested architecture(s) and algorithm(s) Perform RTL design and logic implementation of agreed architecture Integrate subsystems that have both internal and external IPs Perform front-end implementation tasks such as synthesis, logic equivalence check, and STA
Education & Experience
Minimum of BS + 3 years relevant industry experience.