RISC-V High Performance Programmer
Santa Clara Valley (Cupertino), California, United States
Software and Services
Are you a big-picture thinker who loves setting ambitious goals? Do you have a passion for understanding how each line of code affects all the others? In the Core Operating Systems group ensuring the OS is inseparable from each device’s identity as a whole. That’s because this group is committed to building fully integrated operating systems that combine hardware, software, and apps into a single Apple experience. Your dedication to cross-disciplinary collaboration will help develop groundbreaking technologies, such as iOS, macOS, watchOS, and tvOS. By crafting these distinct, holistic user experiences, you’ll continue to uphold and advance the excellence people expect from Apple devices. The Vector and Numerics Group is tasked with designing, enhancing and improving various embedded subsystems running on iOS, macOS, watchOS and tvOS. The group is looking for an exceptional high performance programmer to complement the team and make a difference. As a member of our fast paced group, you will have the unique opportunity to delight and inspire millions of Apple’s customers every day. You will work in a SW and HW cross functional team which is implementing innovative RISC-V solutions and state of the art routines. This is to support the necessary computation for such things as machine learning, vision algorithms, signal and video processing. Push the state of the art in low level computation and drive them towards energy efficient and high performance implementations by tightly integrating software and hardware. The successful candidate will have excellent understanding and knowledge of RISC-V ISA architecture along with working knowledge of NEON micro architecture in ARM CPU cores from a vector programming perspective. Team members are engaged in the design and optimization of low level computational support for machine learning, computational vision and natural language processing such as 2D multi-layered convolution, transformers, FFT and DFT for audio codecs, speech synthesis and encryption to mention a few technologies. Understanding and working knowledge of embedded systems with its prevailing restrictions are a desirable attribute. Being able to craft the fastest and the most energy efficient routines for a particular RISC-V and ARM CPU cores is a plus. Low level high performance programming experience is a must for this position. Being comfortable in vector assembly and low level C is a requirement. The ideal candidate would be at ease in developing both innovative and robust CPU core level algorithms derived from a particular technology’s need in a tight timeline.
- 5+ years low level algorithmic development in signal processing or machine learning primitives.
- Detailed knowledge of RISC-V Instruction Set Architectures (ISA) and vector ISA of ARM.
- Strong understanding of computational efficiency.
- Excellent coding skills in ASM and C.
- Strong verbal and written communication skills.
- Ability to manage multiple tasks and self-prioritize.
Design and implement micro architecturally optimized pieces of Accelerate framework taking into consideration power and energy usage.
Education & Experience
BS/MSEE in mathematics, computer science or computer engineering required, advanced degree preferred.