Formal Verification Engineer

Haifa, Israel
Hardware

Summary

Posted:
Role Number:200023003
Ready for an intellectual challenge that combines Mathematics and CS theory in the context of hardware development? Keep reading! In this role you will be responsible for developing mathematical proofs using model checking tools, to find RTL(Verilog) bugs or prove their absence Not in the Formal domain? No worries, we offer thorough training to learn the theory and practice directly from our team experts

Key Qualifications

  • Excellent graduates from leading universities
  • analytical thinking
  • Highly motivated.

Description

In this role you will be responsible for developing mathematical proofs using model checking tools, to find RTL(Verilog) bugs or prove their absence

Education & Experience

B.Sc. in Mathematics and Computer Science, Electrical/Computer Engineering, M.Sc/PhD Mathematics

Additional Requirements