Experienced SoC Physical Design STA / Timing Engineer
Munich, Bavaria-Bayern, Germany
Hardware
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Join us!
You will be taking part in the Physical Design team as a backend focal point for timing analysis and convergence, working in sophisticated technologies and interacting closely both with RTL designers, Physical Designers and other top level integration teams.
Key Qualifications
- Detailed knowledge of the ASIC design timing closure flow and methodology.
- Proficient in STA and methodologies for timing closure, and have a good understanding of noise, cross-talk, and OCV effects, among others.
- Hands on experience in timing/SDC constraints generation and management.
- Proficient in scripting languages (TCL and Perl).
- Familiarity with synthesis, logic equivalence, DFT and backend related methodology and tools.
- Understand and implement improving existing methodologies and flows. Experience in reducing the number of timing signoff corners by merging different timing modes is highly desired.
- Strong background in Constraint analysis and debug, using industry standard tools as well as backend STA closure.
- Deep understanding and experience in timing closure of various test modes such as scan shift, scan capture, atspeed and Bist testing.
- Familiar with ECO techniques and implementation.
- Experience in ASIC timing constraints generation and timing closure. Expertise in STA tools (Primetime) and flow.
- Familiarity with hierarchical design approach, top-down design, timing and physical convergence.
- Good communication and interaction with Front End teams and Physical Design teams.
- Ability to fluently speak and write in English.
Description
Responsibilities include especially, but are not limited to:
- Work with Physical Design team, highlighting issues & best practices.
- Help build timing ECO’s for project tapeout.
- Build/maintain scripts and methodologies for analysis and runs.
You will be responsible for constraints and timing checkups development, including their delivery for synthesis, PnR and signoff STA. Working in parallel on blocks and chip level STA modes.
Education & Experience
Bachelors's or Master's Degree in a technical field is required.
Additional Requirements
- Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Apple is committed to working with and providing reasonable accommodation to applicants with physical and mental disabilities. Apple is a drug-free workplace