CPU Top-Level Verification Engineer
Boston, Massachusetts, United States
Hardware
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In this highly visible role, you will be at the center of a chip design effort collaborating with many disciplines, with a critical impact on getting high quality products to millions of customers quickly.
Description
As a CPU top-level design verification engineer owning the verification methodology, tools, and flow of a high performance lower power processor design, you will have the responsibilities as follows:
- Work closely with verification engineers and RTL designers on defining effective verification methodology for low power complex processor design.
- Develop test plans, test benches, and test environments
- Develop tests in assembly, and C/C++
- Drive and develop the tools and flows for advanced verification methodology.
- Developing, verifying, and maintaining efficient testbench environments
- Develop coverage monitors and analyze coverage to ensure all the test cases in the plans are covered
Minimum Qualifications
Key Qualifications
- Minimum BS and 10+ years of relevant industry experience
- The ideal candidate should have experience in the following areas:
- Knowledge of digital logic design and processor architecture
- Verification tool and verification development experience
- Random test generator development
- Testbench setup and build experience
- Random regression and failure analysis
- Driving coverage convergence
- Verilog or SystemVerilog
- Programming/scripting skills (C, C++, Python)
- Problem solving skills
Preferred Qualifications
Education & Experience
Minimum BS and 10+ years of relevant industry experience
Additional Requirements
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.