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As a member of Analog Design team in Japan Technical Development Center in Tokyo, you will have the responsibility for Design/Productize Analog ICs.
Key Qualifications
- Good knowledge of common high-speed serial interfaces
- Good knowledge of a variety of CDR architectures
- Good knowledge of Tx/Rx equalization techniques
- Good knowledge of device physics as it applies to analog IC designs.
- Experience in Mixed-Signal simulation
- Experience in lab testing of high-speed serial links
- Experience in behavioral modeling of PHY to assess different architectures
- Knowledge of ESD
- Business level of English communication
- Good to have C / Matlab / Verilog A modeling skills
Description
In this role, the key responsibilities are the followings:
- Create High-speed link-budget and specification definition for PHY
- Create block-level specifications based on link-budget and transistor-level feasibility
- Perform transistor-level feasibility studies for various blocks in Rx/Tx/Clk generation
- Design and simulate transistor-level design of PHY high-speed blocks
- Collaborate with layout designers for overall circuit design including layout parasitic and mismatch.
- Document design and simulation results for formal design review process.
- Define production / bench-level test plans for production / evaluation.
Education & Experience
University Degree (MS is of preference) in relevant field of specialization.